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vishay siliconix sip21106, sip21107, sip21108 document number: 74442 s09-1047-rev. g, 08-jun-09 www.vishay.com 1 150-ma low noise, low dropout regulator description the sip21106 bicmos 150 ma low noise ldo voltage regulators are the perfect choice for low battery operated low powered applications. an ultra low ground current and low dropout voltage of 135 mv at 150 ma load helps to extend battery life for portable electronics. systems requiring a quiet voltage source, such as rf applic ations, will benefit from the sip21106 low output noise. the sip21107 do not require a noise bypass capacitor and provides an error flag pin (p ok or power ok). pok output requires an external pull-up resistor and goes low when the supply has not come up to voltage. the sip21108 output is adjusted with an external resistor network. the sip21106, sip21107, sip21108 regulators allow stable operation with very small ceramic output capacitors, reducing board space and component cost. they are designed to maintain regulation while delivering 330 ma peak current upon turn-on. during start-up, an active pull-down circuit improves the output transient response and regulation. in shutdown mode, the output automatically discharges to ground through a 100 nmos. the sip21106, sip21107, sip21108 are available in tsot23-5l a super thin lead (pb)-free tsc75-6l and sc70-5l packages for operation over the industrial operation range (- 40 c to 85 c). features ? sc70-5l (2.1 mm x 2.1 mm x 0.95 mm) ? tsot23-5l (3.05 mm x 2.85 mm x 1.0 mm) ? tsc75-6l package (1.6 mm x 1.6 mm x 0.55 mm), tsot23-5l and sc70-5l package options ? 1.0 % output voltage accuracy at 25 c ? low dropout voltage: 135 mv at 150 ma ? sip21106 low noise: 60 v (rms) (10 hz to 100 khz bandwidth) with 10 nf over full load range ? 35 a (typical) ground current at 1 ma load ? 1 a maximum shutdown current at 85 c ? output auto discharge at shutdown mode ? built-in short circuit (330 ma typical) and thermal protection (160 c typical) ? sip21108 adjustable output voltage ? sip21107 pok error flag ? - 40 c to + 125 c junction temperature range for operation ? uses low esr ceramic capacitors ? fixed voltage output 1.2 v to 5 v in 50 mv steps ? compliant to rohs directive 2002/95/ec applications ? cellular phones, wireless handsets ?pdas ? mp3 players ? digital cameras ? pagers ? wireless modem ? noise-sensitive electronic systems typical application circuit c bypass = 10 nf bp en gnd v in v out 4 5 2 3 1 c out = 1 f v out c in = 1 f v in en sip21106 tsot23-5l/sc70-5lpackage tsc75-6l package c bypass = 10 nf v out nc v in gnd en bp c out = 1 f v out c in = 1 f v in en sip21106 rohs compliant
www.vishay.com 2 document number: 74442 s09-1047-rev. g, 08-jun-09 vishay siliconix sip21106, sip21107, sip21108 typical application circuit notes: a. derate 7.6 mw/c for tsc75-6l package, 5.5 mw/ c for tsot23-5l and 3.4 mw/c for sc70-5l package above t a = 70 c. b. device mounted with all leads soldered or welded to multilayer 1s2p pc board. c. soldering for 5 s. stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating/conditions for extended periods may affect device reliability. tsot23-5l/sc70-5lpackage pok en gnd v in v out c out = 1 f pok c in = 1 f sip21107 v out tsc75l-6 package v out nc v in gnd en pok 4 5 2 3 1 c out =1 f pok c in = 1 f v in en sip21107 v out tsc75-6l package v out n c v i n g n d e n adj c out = 1 f v out c i n = 1 f v i n e n sip2110 8 a d j e n g n d v i n v out 4 5 2 3 1 c out = 1 f v out c i n = 1 f v i n e n sip2110 8 tsot23-5l/sc70-5l package absolute maximum ratings parameter limit unit input voltage, v in to gnd - 0.3 to 6.5 v v en (see detailed description) - 0.3 to 6.5 output current (i out ) short circuit protected output voltage (v out ) - 0.3 to v in + 0.3 v tsc75-6l tsot23-5l sc70-5l package power dissipation (p d ) a 420 305 187 mw package thermal resistance ( ja ) b 131 180 294 c/w maximum junction temperature, t j(max) 125 c storage temperature, t stg - 65 to 150 lead temperature, t l c 260 recommended operating range parameter limit unit input voltage, v in 2.2 to 6 v operating ambient temperature t a - 40 to 85 c
document number: 74442 s09-1047-rev. g, 08-jun-09 www.vishay.com 3 vishay siliconix sip21106, sip21107, sip21108 specifications parameter symbol test conditions unless specified v in = v out(nom) + 1.0 v = v en i out = 1 ma, c in = 1 f, c out = 1 f - 40 c < t a < 85 c for full temp. a unit m i n . b typ. c max. b input voltage range v in full 2.2 6 v output voltage accuracy v out i out = 1 ma room - 1.0 1.0 % full - 2.5 2.5 sip21106/7 (1.2 v) i out = 1 ma room - 1.5 1.5 full - 4 4 feedback voltage (sip21108 version only) v adj room 1.188 1.2 1.212 v full 1.170 1.230 line regulation lnr full - 0.2 0.006 0.2 %/v load regulation ldr v out 2.6 v, i out : 1 ma to 150 ma room 0.003 0.006 %/ma v out < 2.6 v, i out : 1 ma to 150 ma room 0.005 0.009 ground pin current e i gnd i out = 1 ma room 35 75 a full 85 i out = 150 ma room 39 75 full 85 shutdown supply current i cc(off) v en = 0 v full 0.02 1 a output noise voltage f (rms) e n sip21106 v out(nom) = 2.8 v, bw = 10 hz to 100 khz, 1 ma < i out < 150 ma, c bp = 0.01 f room 60 v sip21107/8 v out(nom) = 2.8 v, bw = 10 hz to 100 khz, 1 ma < i out < 150 ma room 350 output voltage turn-on time t on en to v out delay; i out = 1 ma 70 s ripple rejection psrr sip21106, c bp = 0.01 f i out = 10 ma f = 1 khz room 75 db f = 10 khz room 56 f = 100 khz room 40 sip21107/8 sip21106, c bp = 0 f i out = 10 ma f = 1 khz room 72 f = 10 khz room 53 f = 100 khz room 38 output current limit i o_lim v out = 0 v room 170 330 600 ma auto discharge resistance r dis en = 0 v, v out = 1 v room 100 for v out < 2.2 v, en = 0 v, v out = 1 v room 120 dropout voltage d (2.2 v v out(nom) < 2.6 v) v do i out = 50 ma room 45 mv full 55 i out = 100 ma room 90 full 106 i out = 150 ma room 135 250 full 160 300 dropout voltage (v out(nom) 2.6 v) v do i out = 50 ma room 45 full 55 i out = 100 ma room 90 full 106 i out = 150 ma room 135 180 full 160 220 en pin input voltage v enh high = regulator on (rising) full 1.2 v v enl low = regulator off (falling) full 0.4 en pin input current i en room 0.009 a
www.vishay.com 4 document number: 74442 s09-1047-rev. g, 08-jun-09 vishay siliconix sip21106, sip21107, sip21108 notes: a. room = 25 c, full = - 40 to 85 c. derate 7.6 mw/c for tsc75 and 5.5 mw/c for sot23 above t a = 70 c. b. the algebraic convention whereby the most negative va lue is a minimum and the most positive a maximum. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. dropout voltage is defined as the input-to-output differentia l voltage at which the output voltage drops 2 % below its nomina l value with constant load. for outputs = 2.2 v, dropout voltage is not applicable due to 2.2 v minimum input voltage requirement . e. ground current is specified for normal operation as well as ?drop-out? operation. f. output noise is proportional to output voltage. use formula e n = 60 v(rms)*v out /2.8 v. g. pok threshold percentage is calculated by v in /v out x 100 %. the pok is measured wi th a differential voltage across v in and v out until pok turn on (low threshold) or off (high threshold). for v out less than 2.2 v, pok is guaranteed functionality only. timing waveforms specifications parameter symbol test conditions unless specified v in = v out(nom) + 1.0 v i out = 1 ma, c in = 1 f, c out = 1 f - 40 c < t a < 85 c for full temp. a unit m i n . b typ. c max. b thermal shutdown junction temperature t j(s/d) room 160 c thermal hysteresis t hyst room 20 error flag section (sip21107 version only) pok(off) leakage i off r pu to v out or v in full 1 a pok(on) voltage v pokl en = 0 v, i pok = 0.5 ma full 0.4 v pok threshold g v poklh v out rising, pok goes high v out(nom) 2.2 v, i out = 1 ma full 90 93 96 % v out rising, pok goes high v out(nom) < 2.2 v, i out = 1 ma 91 pok hysteresis v hyst v in falling, i out = 1 ma, pok goes low room 1.5 pok voltage delay time t p_delay v out to pok delay, i out = 1 ma 40 s figure 1. v e n 0.95 v n om v out v n om t o n 0 v v i n t r 1 s
document number: 74442 s09-1047-rev. g, 08-jun-09 www.vishay.com 5 vishay siliconix sip21106, sip21107, sip21108 pin configuration e n g n d v v n c bp/adj/pok i n out top v ie w 1 2 3 4 5 6 e n g n d v v n c bp/adj/pok i n out bottom v ie w tsc75-6l package (1.6 mm x 1.6 mm x 0.55 mm) figure 2. en gnd v v bp/adj/pok in out 1 2 3 4 5 1 2 3 4 5 top view en gnd v in v bp/adj/pok out bottom view tsot23-5l/sc70-5lpackage pin description pin number tsc75-6l pin number tsot23-5l/ sc70-5l name function 13 en by applying less than 0.4 v to this pin, the device will be turned off. connect this pin to v in if unused. do not leave floating. 2 2 gnd ground pin. for better thermal capability , directly connected to large ground plane. 31 v in input supply pin. bypass this pin with a 1 f ceramic or tantalum capacitor to ground. 45 v out output voltage. connect c out between this pin and ground. 5 - nc no connection. 6 4 bp/adj/pok - bp (sip21106): noise bypass pin. for low noi se applications, a 10 nf ceramic capacitor should be connected from this pin to ground. - adj (sip21108): adjust input pin. connect feedback resistors to program the output voltage for trim value of 1.2005 v. - pok (sip21107): power ok (error flag) pin. open-drain output, which requires connecting a pull-up resistor to v in or v out . pok pin is actively high to indicate an output normal operation condition on regulator and goes low to indicate under-voltage fault condition.
www.vishay.com 6 document number: 74442 s09-1047-rev. g, 08-jun-09 vishay siliconix sip21106, sip21107, sip21108 ordering information part number marking voltage temperature range package sip21108dvp-t1-e3 aa adjustable - 40 c to 85 c tsc75-6l sip21106dvp-12-e3 ba 1.2 sip21106dvp-18-e3 bg 1.8 sip21106dvp-25-e3 bp 2.5 sip21106dvp-26-e3 br 2.6 sip21106dvp-28-e3 bt 2.8 sip21106dvp-285-e3 ct 2.85 sip21106dvp-30-e3 bv 3 sip21106dvp-33-e3 by 3.3 sip21106dvp-46-e3 cm 4.6 sip21106dvp-475-e3 cu 4.75 sip21107dvp-12-e3 da 1.2 sip21107dvp-18-e3 dg 1.8 sip21107dvp-25-e3 dp 2.5 sip21107dvp-26-e3 dr 2.6 sip21107dvp-28-e3 dt 2.8 sip21107dvp-30-e3 dv 3 sip21107dvp-33-e3 dy 3.3 sip21107dvp-46-e3 em 4.6 sip21107dvp-285-e3 et 2.85 sip21108dt-t1-e3 n9 adjustable - 40 c to 85 c tsot23-5l SIP21106DT-12-E3 np 1.2 sip21106dt-18-e3 n1 1.8 sip21106dt-25-e3 na 2.5 sip21106dt-26-e3 nc 2.6 sip21106dt-28-e3 n2 2.8 sip21106dt-285-e3 ne 2.85 sip21106dt-30-e3 ng 3 sip21106dt-33-e3 n3 3.3 sip21106dt-45-e3 nm 4.5 sip21106dt-46-e3 n4 4.6 sip21106dt-475-e3 nj 4.75 sip21107dt-12-e3 nq 1.2 sip21107dt-18-e3 n5 1.8 sip21107dt-25-e3 nb 2.5 sip21107dt-26-e3 nd 2.6 sip21107dt-28-e3 n6 2.8 sip21107dt-285-e3 nf 2.85 sip21107dt-30-e3 nh 3 sip21107dt-33-e3 n7 3.3 sip21107dt-46-e3 n8 4.6
sip21106, sip21107, sip21108 vishay siliconix document number: 74442 s09-1047-rev. g, 08-jun-09 www.vishay.com 7 note: other fixed output voltage options are availa ble. please contact your vishay sales r epresentative or dist ributor for details. sip21108dr-t1-e3 n9 adjustable - 40 c to 85 c sc70-5l sip21106dr-12-e3 np 1.2 sip21106dr-18-e3 n1 1.8 sip21106dr-25-e3 na 2.5 sip21106dr-26-e3 nc 2.6 sip21106dr-28-e3 n2 2.8 sip21106dr-285-e3 ne 2.85 sip21106dr-30-e3 ng 3 sip21106dr-33-e3 n3 3.3 sip21106dr-46-e3 n4 4.6 sip21106dr-475-e3 nj 4.75 sip21107dr-12-e3 nq 1.2 sip21107dr-18-e3 n5 1.8 sip21107dr-25-e3 nb 2.5 sip21107dr-26-e3 nd 2.6 sip21107dr-28-e3 n6 2.8 sip21107dr-285-e3 nf 2.85 sip21107dr-30-e3 nh 3 sip21107dr-33-e3 n7 3.3 sip21107dr-46-e3 n8 4.6 ordering information
www.vishay.com 8 document number: 74442 s09-1047-rev. g, 08-jun-09 vishay siliconix sip21106, sip21107, sip21108 typical characteristics output voltage vs. input voltage dropout voltage vs. load current dropout voltage vs. temperature 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0123456 v in (v) v out (v) i out = 0 ma i out = 150 ma sip21106: 2.8 v 0 20 40 60 80 100 120 140 160 180 0 25 50 75 100 125 150 i out (ma) v do (mv) t a = + 85 c t a = + 25 c t a = - 40 c sip21106: 2.8 v 20 40 60 80 100 120 140 160 180 - 40 - 15 10 35 60 85 temperature (c) v do (mv) i out = 150 ma i out = 100 ma i out = 50 ma sip21106: 2.8 v output voltage accuracy vs. temperature dropout voltage vs. input voltage ground current vs. temperature - 1.50 - 1.00 - 0.50 0.00 0.50 1.00 - 40 - 15 10 35 60 85 temperature (c) deviation (%) i out = 1 ma sip21106: 2.8 v 60 8 0 100 120 140 160 1 8 0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 v i n ( v ) v do (m v ) i out = 150 ma i out = 100 ma sip21106: 2. 8 v 34 35 36 37 38 39 40 41 - 40 - 15 10 35 60 85 temperature (c) i out = 150 ma i out = 1 ma sip21106: 2.8 v
sip21106, sip21107, sip21108 vishay siliconix document number: 74442 s09-1047-rev. g, 08-jun-09 www.vishay.com 9 typical characteristics ground current vs. output current psrr 25 30 35 40 45 50 0 25 50 75 100 125 150 i out (ma) i gnd (a) v in = 5.5 v v in = 3.8 v sip21106: 2.8 v 0 10 20 30 40 50 60 70 8 0 10 100 1000 10 000 100 000 1 000 000 fre qu ency (hz) psrr (db) sip21106 c bp = 10 nf i out = 10 ma ground current vs. input voltage at 25 c output voltage accuracy vs. load current v in (v) i gnd (a) i out = 150 ma i out = 1 ma sip21106: 2.8 v 0 10 20 30 40 50 0123456 v out (v) 2.720 2.740 2.760 2.780 2.800 2.820 - 40 - 15 10 35 60 85 temperature (c) i out = 1 ma i out = 150 ma i out = 50 ma sip21106: 2.8 v v in = 3.8 v output noise vs. bp capacitance output noise (v) 0 0.001 0.0056 0.01 0.056 0.1 bp capacitance (f) sip21106: 2.8 v 50 100 150 200 250 300 350 400
www.vishay.com 10 document number: 74442 s09-1047-rev. g, 08-jun-09 vishay siliconix sip21106, sip21107, sip21108 typical operating waveforms 50 s/div load transient response 200 s/div line transient response 200 s/div line transient response i out (100 ma/div) v out (50 mv/div) sip21106: 4.6 v v in = 5.5 v v out = 4.6 v c in = 1 f c out = 1 f c bp = 10 nf v out (10 mv/div) v in (200 mv/div) ac coupling sip21106: 4.6 v v in = 5.0 to 5.5 v i out = 150 ma c bp = 10 nf v out = 4.6 v c out = 1 f c in = 1 f v out (10 mv/div) v in (200 mv/div) ac coupling sip21106: 4.6 v v in = 5.0 to 5.5 v i out = 1 ma c in = 1 f c bp = 10 nf v out = 4.6 v c out = 1 f 50 s/div load transient response 200 s/div line transient response 200 s/div line transient response i out (100 ma/div) v out (50 mv/div) sip21106: 2.8 v v in = 3.8 v v out = 2.8 v c in = 1 f c out = 1 f c bp = 10 nf sip21106: 2.8 v v in = 3.8 to 4.8 v v out = 2.8 v i out = 150 ma c in = 1 f c out = 1 f c bp = 10 nf v in (1 v/div) ac coupling v out (10 mv/div) v in (1 v/div) ac coupling sip21106: 2.8 v v in = 3.8 to 4.8 v v out = 2.8 v i out = 1 ma c in = 1 f c out = 1 f c bp = 10 nf v out (10 mv/div)
sip21106, sip21107, sip21108 vishay siliconix document number: 74442 s09-1047-rev. g, 08-jun-09 www.vishay.com 11 typical operating waveforms 50 ms/div output short circuit current 20 s/div output voltage power-down 20 ms/div pok pin goes low to indicate output under-voltage fault condition sip21106: 2.8 v v in = 3.8 v v out = 2.8 v c in = 1 f c out = 1 f c bp = 10 nf i out (50 ma/div) sip21106: 2.8 v v in = 3.8 v v out = 2.8 v c in = 1 f c out = 1 f c bp = 10 nf i out = 150 ma v en (500 mv/div) v out (500 mv/div) sip21107: 1.8 v v in = 2.8 v v out = 1.8 v c in = 1 f c out = 1 f c bp = 10 nf i out = 1 ma pok (1 v/div) v out (500 mv/div) 50 ms/div output short thermal cycling 20 s/div output voltage start-up 20 ms/div pok pin goes low to indicate output under-voltage fault condition sip21106: 2.8 v v in = 3.8 v v out = 2.8 v c in = 1 f c out = 1 f c bp = 10 nf i out (100 ma/div) sip21106: 2.8 v v in = 3.8 v v out = 2.8 v c in = 1 f c out = 1 f c bp = 10 nf i out = 150 ma v out (500 mv/div) v en (1 v/div) sip21107: 2.8 v v in = 3.8 v v out = 2.8 v c in = 1 f c out = 1 f c bp = 10 nf i out = 1 ma v out (500 mv/div) pok (1 v/div)
www.vishay.com 12 document number: 74442 s09-1047-rev. g, 08-jun-09 vishay siliconix sip21106, sip21107, sip21108 typical operating waveforms typical waveforms functional block diagram 20 s/div pok pin is actively high to indicate an output normal operation condition on regular sip21107: 1.8 v v in = 2.8 v v out = 1.8 v c out = 1 f c bp = 10 nf i out = 1 ma v out (500 mv/div) pok (1 v/div) c in = 1 f 20 s/div pok pin is actively high to indicate an output normal operation condition on regular sip21107: 2.8 v v in = 3.8 v c out = 1 f c bp = 10 nf i out = 1 ma v out (500 mv/div) pok (1 v/div) v out = 2.8 v c in = 1 f 2 ms/div output noise sip21106: 2.8 v v in = 4.5 v v out = 2.8 v c in = 1 f c out = 1 f c bp = 10 nf i out = 150 ma v out (100 v/div) v noise = 60 v rms output noise spectral density 1 0.01 0.1 noise spectral density (v/ hz) frequency (hz) 10k 1m 1k 100 10 100k c out = 1 f c bp = 10 nf i out = 100 ma v out = 2.8 v c in = 1 f sip21106: 2.8 v v in = 3.8 v figure 3. v i n e n * ** *** bp/adj/pok v out ena b le c u rrent limit and thermal bandgap reference error-amp g n d pok 0.94 sip21106: bp sip21107: pok sip2110 8 : adj sip21106: bp sip21107: pok sip2110 8 : adj * *** ** + - v out
sip21106, sip21107, sip21108 vishay siliconix document number: 74442 s09-1047-rev. g, 08-jun-09 www.vishay.com 13 detailed description as shown in the block diagram, the circuit consists of a bandgap reference, error amplifier, p-channel pass transistor and an internal feedb ack resistor voltage divider, which is used to monitor and control the output voltage. a constant 1.2 v bandgap reference voltage is applied to the non-inverting input of the error amplifier. the error amplifier compares this reference wit h the feedback voltage on its inverting input and amplifies the difference. if the feedback voltage is lower than the reference voltage, the pass-transistor gate is pulled low. this increases the pmos's gate to source voltage and allows more current to pass through the transistor to the output which increases the output voltage. conversely, if the feedback voltage is higher than the reference voltage, t he pass transistor gate is pulled high, decreasing the gate-to -source voltage, thereby allowing less current to pass to the output and causing it to drop. internal p-channel pass transistor a 0.9 (typical) p-channel mosfet is used as the pass transistor for the sip21106, sip21107, sip21108 part series. the mosfet transistor offers many advantages over the more, formerly, co mmon pnp pass transistor designs, which ultimately result in longer battery lifetime. the main disadvantage of pnp pass transist ors is that they require a certain base current to stay on, which significantly increases under heavy load conditions. in addition, during dropout, when the pass transistor saturates, the pnp regulators waste considerable current. in contrast, p-channel mosfets require virtually zero-base drive and do not suffer from the stated problems. t hese savings in base drive current translate to lower quiescent current which is typical around 35 a as shown in the typical characteristics. shutdown and auto-d ischage/no-discharge bringing the en voltage low will place the part in shutdown mode where the device output enters a high-impedance state and the quiescent current is reduced to below 1 a, reducing the drain on the battery in standby mode and increasing standby time. connect en pin to input for normal operation. the output has an internal pull down to discharge the output to ground when the en pin is low. the internal pull down is a 100 typical resistor, which can discharge a 1 f in less than 1 ms. refer to typical operating waveforms for turn-off waveforms. output voltage selection the sip21106 has fixed volta ge outputs that are preset to voltages from 1.2 v to 4.6 v (see ordering information). the sip21108 has a user-adjustable output that can be set through the resistor feedback network consisting of r 1 and r 2 . r 2 range of 100k to 400k is recommended to be consistent with ground current specification. r 1 can then be determined by the following equation: where v ref is typically 1.2005 v. use 1 % or better resistors for better output voltage accuracy (see figure 4). current limit the sip21106, sip21107, sip2 1108 include a current limit block which monitors the current passing through the pass transistor through a current mirror and controls the gate voltage of the mosfet, limiti ng the output current to 330 ma (typical). this current limit feat ure allows for the output to be shorted to ground for an indefinite amount of time without damaging the device. thermal-overload protection the thermal overload protection limits the total power dissipation and protects t he device from being damaged. when the junction temperature exceeds t j = 150 c, the device turns the p-channel pass transistor off allowing the device to cool down. once the temperature drops by about 20 c, the thermal sensor turns the pass transistor on again and resumes normal operation. consequently, a continuous thermal overload condition will result in a pulsed output. it is generally recommended to not exceed the junction temperature rating of 125 c for continuous operation. noise reduction in sip21106 for the sip21106, an external 10 nf bypass capacitor at bp pin is used to create a low pass filter for noise reduction. the startup time is fast, since a power-on circuit pre-charges the bypass capacitor. after the power-up sequence the pre-charge circuit is switched to standby mode in order to save current. it is therefore not recommended to use larger bypass capacitor values than 50 nf. when the circuit is used without a capacitor, stable operation is guaranteed. figure 4. error-amp - + 1.2 v reference v r r out 1 2 v in r = r x - 1 1 2 v out v ref ( )
www.vishay.com 14 document number: 74442 s09-1047-rev. g, 08-jun-09 vishay siliconix sip21106, sip21107, sip21108 pok status in sip21107 the pok comparator monitors the output until the supply comes up to specified percentage of v in . this open drain nmos output requires an external pull-up resistor to either v out or v in . the internal nmos can drive up to 0.5 ma loads. pok pin is active high to indicate that output is within percentage tolerance. pok goes low when output is outside of this tolerance as when in dropout, over current and thermal shutdown. application information input/output capacitor selection and regulator stability it is recommended that a low esr 1 f capacitor be used on the sip21106, sip21107, sip21108 input. a larger input capacitance with lower esr would improve noise rejection and line-transient response. a larger input bypass capacitor may be required in applications involving long inductive traces between the source and ld o. the circuit is stable with only a small output capacit or equal to 6 nf/ma ( 1 f at 150 ma) of load. since the bandwidth of the error amplifier is around 1 mhz - 3 mhz and the dominant pole is at the output node, the capacitor should be capacitive in this range, i.e., for 150 ma load current, an esr < 0.4 is necessary. parasitic inductance of about 10 nh can be tolerated. applying a larger output capacitor would increase power supply rejection and improve load-transient response. some ceramic dielectrics such as the z5u and y5v exhibit large capacitance and esr variation over temperature. if such capacitors are used, a 2.2 f or larger value may be needed to ensure stability over the industrial temperature range. if using higher quality ceramic capacitors, such as those with x7r and y7r dielectrics, a 1 f capacitor wi ll be sufficient at all operating temperatures. operating region and power dissipation an important consideration when designing power supplies is the maximum allowable power dissipation of a part. the maximum power dissipation in any application is dependant on the maximum junction temperature, t j(max) = 125 c, the ambient temperature, t a , and the junction-to-ambient thermal resistance for the package, which is the summation of j-c , the thermal resistance of the package, and c-a , the thermal resistance through the pc board and copper traces. power dissipation may be expressed as: the gnd pin of the sip2110 acts as both the electrical connection to gnd as well as a path for channeling away heat. connect this pin to a gnd plane to maximize heat dissipation. once maximum power dissipation is calculated using the equation above, the maximum allowable output current for any input/output potential can be calculated as pcb layout the component placement around the ldo should be done carefully to achieve good dynamic line and load response. the input and noise capacitor should be kept close to the ldo. the rise in junction temperature depends on how efficiently the heat is carried away from junction-to-ambient. the junction-to-lead thermal impedance is a characteristic of the package and is fixed. the thermal impedance between lead-to-ambient can be reduced by increasing the copper area on pcb. increase the in put, output and ground trace area to reduce the junction-to-ambient thermal impedance. vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?74442 . p (max) = t (max) - t j + j-c c-a a i out(max) = p (max) v - i n v out
e1 e1 e ? b ? c m 0.15 b a b e 54 13 213 2 64 5 e1 e1 e ? b ? c m 0.15 b a b e d ? c ? a1 a2 a seating plane ? a ? c 0.08 l r r q 4x 1 0.17 ref c seating plane gauge plane l 2 (l1) 4x 1 sot23-5l format sot23-6l format package information vishay siliconix document number: 72821 29-jan-04 www.vishay.com 1 thin sot-23 : 5- and 6-lead (power ic only) millimeters inches dim min nom max min nom max a 0.91 1.00 1.10 0.036 0.039 0.043 a1 0.01 0.05 0.10 0.0004 0.002 0.004 a2 0.90 0.95 1.00 0.035 0.037 0.039 b 0.30 0.32 0.45 0.012 0.013 0.018 c 0.10 0.15 0.20 0.004 0.006 0.008 d 2.90 3.05 3.10 0.114 0.120 0.122 e 2.70 2.85 2.98 0.106 0.112 0.117 e1 1.525 1.65 1.70 0.060 0.065 0.067 e 0.95 bsc 0.0374 bsc e1 1.80 1.90 2.00 0.070 0.075 0.080 l 0.30 0.40 0.60 0.012 0.016 0.024 l1 0.60 ref 0.024 ref l2 0.25 bsc 0.010 bsc r 0.10 ? ? 0.004 ? ? q 0 4 8 0 4 8 1 4 10 nom 12 4 10 nom 12 ecn: s-40083?rev. a, 02-feb-04 dwg: 5926
notes: 1. dimensioning and tolerancing per ansi y14.5m-1994. 2. controlling dimensions: millimeters converted to inch dimensions are not necessarily exact. 3. dimension ?d? does not include mold flash, protrusion or gate burr. mold flash, protrusion or gate burr shall not exceed 0.15 mm (0.006 inch) per side. 4. the package top shall be smaller than the package bottom. dimension ?d? and ?e1? are determined at the outer most extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. c 0.15 (0.006) d e b d e1 n5 n4 n3 n1 n2 e e/2 b pin 1 e/1 e1/2 c 0.15 (0.006) c 0.10 (0.004) m a b c c 0.10 (0.004) a c seating plane a1 a2 sectiion a-a base metal (b) b1 c1 c a a detail a see detail a gage plane 0.15 (0.0059) h l u u1 package information vishay siliconix document number: 73201 19-nov-04 www.vishay.com 1 sc-70: 3/4/5/6-leads (pic only) pin lead count pin code 3 4 5 6 n1 ? ? 2 2 n2 2 2 3 3 n3 ? 3 4 4 n4 3 ? ? 5 n5 ? 4 5 6
package information vishay siliconix www.vishay.com 2 document number: 73201 19-nov-04 millimeters inches dim min nom max min nom max a 0.80 ? 1.10 0.031 ? 0.043 a1 0.00 ? 0.10 0.000 ? 0.004 a2 0.80 0.90 1.00 0.031 0.035 0.040 b 0.15 ? 0.30 0.006 ? 0.012 b1 0.15 0.20 0.25 0.006 0.008 0.010 c 0.08 ? 0.25 0.003 ? 0.010 c1 0.08 0.13 0.20 0.003 0.005 0.008 d 1.90 2.10 2.15 0.074 0.082 0.084 e 2.00 2.10 2.20 0.078 0.082 0.086 e 1 1.15 1.25 1.35 0.045 0.050 0.055 e 0.65 bsc 0.0255 bsc e 1 1.30 bsc 0.0512 bsc l 0.26 0.36 0.46 0.010 0.014 0.018 u 0 ? 8 0 ? 8 u1 4 10 4 10 ecn: s-42145?rev. a, 22-nov-04 dwg: 5941
vishay siliconix package information document number: 74416 02-oct-06 www.vishay.com 1 dim millimeters inches min nom max min nom max a 0.50 0.55 0.65 0.020 0.022 0.026 a1 0 - 0.05 0 - 0.002 b 0.20 0.25 0.30 0.008 0.010 0.012 c 0.10 0.15 0.20 0.006 0.008 0.010 d 1.55 1.60 1.65 0.0061 0.063 0.065 d1 0.95 1.00 1.05 0.037 0.039 0.041 e 1.55 1.60 1.65 0.061 0.063 0.065 e1 0.55 0.60 0.65 0.022 0.024 0.026 e 0.50 bsc 0.020 bsc e1 1.00 bsc 0.039 bsc k 0.15 - - 0.006 - - k2 0.20 - - 0.008 l 0.20 0.25 0.30 0.008 0.010 0.012 ecn: s-61919-rev. a, 02-oct-06 dwg: 5955 powerpak tsc75-6l (power ic only) ? top view pin 1 dot by marking ppak tsc75 (1.6 x 1.6 mm) k2 k2 bottom view e1 side view a a1 c d e e b d1 exposed pad e1 exposed pad k k pin3 pin 2 pin1 l pin4 pin 5 pin6
document number: 91 000 www.vishay.com revision: 11-mar-11 1 disclaimer legal disclaimer notice vishay all product, product specifications and data ar e subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicab le law, vishay disc laims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, incl uding without limitation specia l, consequential or incidental dama ges, and (iii) any and all impl ied warranties, including warran ties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of pro ducts for certain types of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in gene ric applications. such statements are not binding statements about the suitability of products for a partic ular application. it is the customers responsibility to validate that a particu lar product with the properties described in th e product specification is su itable for use in a particul ar application. parameters provided in datasheets an d/or specifications may vary in different applications and perfo rmance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product co uld result in person al injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk and agr ee to fully indemnify and hold vishay and it s distributors harmless from and against an y and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that vis hay or its distributor was negligent regarding the design or manufact ure of the part. please contact authorized vishay personnel t o obtain written terms and conditions regarding products designed fo r such applications. no license, express or implied, by estoppel or otherwise, to any intelle ctual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.

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